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  hexfet   power mosfet fig 1. typical on-resistance vs. gate voltage fig 2. maximum drain current vs. case temperature benefits improved gate, avalanche and dynamic dv/dt ruggedness  fully characterized capacitance and avalanche soa  enhanced body diode dv/dt and di/dt capability  rohs compliant containing no lead, no bromide, and no halogen applications  brushed motor drive applications  bldc motor drive applications  battery powered circuits  half-bridge and full-bridge topologies  synchronous rectifier applications  resonant mode power supplies  or-ing and redundant power switches  dc/dc and ac/dc converters  dc/ac inverters 25 50 75 100 125 150 t c , case temperature (c) 0 50 100 150 200 250 300 i d , d r a i n c u r r e n t ( a ) limited by package 4 6 8 10 12 14 16 18 20 v gs, gate -to -source voltage (v) 0.0 2.0 4.0 6.0 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( m ) i d = 100a t j = 25c t j = 125c 
    pqfn 5x6 mm orderable part number form quantity IRFH7004pbf pqfn 5mm x 6mm tape and reel 4000 IRFH7004trpbf base part number package type standard pack v dss 40v r ds(on) typ. 1.1m max. 1.4m i d (silicon limited) 259a i d (package limited) 100a    
   
    
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   !"    calculated continuous current based on maximum allowable junctiontemperature. package is limited to 100a by production test capability. note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements.  
  repetitive rating; pulse width limited by max. junctiontemperature.  limited by t jmax , starting t j = 25c, l = 0.038mh r g = 50 , i as = 100a, v gs =10v.  i sd 100a, di/dt 1366a/ s, v dd v (br)dss , t j 150c.  pulse width 400 s; duty cycle 2%.  c oss eff. (tr) is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss .  c oss eff. (er) is a fixed capacitance that gives the same energy as c oss while v ds is rising from 0 to 80% v dss . when mounted on 1 inch square 2 oz copper pad on 1.5 x 1.5 in. board offr-4 material.
      limited by t jmax , starting t j = 25c, l = 1mh, r g = 50 , i as = 31a, v gs =10v. absolute maximum ratings symbol parameter units i d @ t c = 25c continuous drain current, v gs @ 10v (silicon limited) i d @ t c = 100c continuous drain current, v gs @ 10v (silicon limited) i d @ t c = 25c continuous drain current, v gs @ 10v (wire bond limited) i dm pulsed drain current p d @t c = 25c maximum power dissipation w linear derating factor w/c v gs gate-to-source voltage v t j operating junction and t stg storage temperature range avalanche characteristics e as (thermally limited) single pulse avalanche energy  mj e as (thermally limited) single pulse avalanche energy  i ar avalanche current  a e ar repetitive avalanche energy mj thermal resistance symbol parameter typ. max. units r jc (bottom) junction-to-case  0.5 0.8 r jc (top) junction-to-case  CCC 15 r ja junction-to-ambient  CCC 34 r ja (<10s) junction-to-ambient  CCC 21 max. 259  164  1247 100 479 -55 to + 150 20 1.3 c/w a c 191 see fig. 14, 15, 22a, 22b 156 static @ t j = 25c (unless otherwise specified) symbol parameter min. typ. max. units v (br)dss drain-to-source breakdown voltage 40 CCC CCC v ? v (br)dss / ? t j breakdown voltage temp. coefficient CCC 0.033 CCC v/c r ds(on) static drain-to-source on-resistance CCC 1.1 1.4 m CCC 1.7 CCC m v gs(th) gate threshold voltage 2.2 3.0 3.9 v i dss drain-to-source leakage current CCC CCC 1.0 a CCC CCC 150 i gss gate-to-source forward leakage CCC CCC 100 na gate-to-source reverse leakage CCC CCC -100 r g internal gate resistance CCC 2.4 CCC v gs = -20v v ds = 40v, v gs = 0v v ds = 40v, v gs = 0v, t j = 125c v gs = 6.0v, i d = 50a conditions v gs = 0v, i d = 250 a reference to 25c, i d = 1.0ma  v gs = 10v, i d = 100a v ds = v gs , i d = 150 a v gs = 20v downloaded from: http:///

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   !"  s d g dynamic @ t j = 25c (unless otherwise specified) symbol parameter min. typ. max. units gfs forward transconductance 117 CCC CCC s q g total gate charge CCC 129 194 nc q gs gate-to-source charge CCC 34 CCC q gd gate-to-drain ("miller") charge CCC 40 CCC q sync total gate charge sync. (q g - q gd ) CCC 169 CCC t d(on) turn-on delay time CCC 15 CCC ns t r rise time CCC 51 CCC t d(off) turn-off delay time CCC 73 CCC t f fall time CCC 49 CCC c iss input capacitance CCC 6419 CCC pf c oss output capacitance CCC 952 CCC c rss reverse transfer capacitance CCC 656 CCC c oss eff. (er) effective output capacitance (energy related) CCC 1161 CCC c oss eff. (tr) effective output capacitance (time related) CCC 1305 CCC diode characteristics symbol parameter min. typ. max. units i s continuous source current CCC CCC 100 a (body diode) i sm pulsed source current CCC CCC 1247 a (body diode)  v sd diode forward voltage CCC 0.95 1.3 v dv/dt peak diode recovery  CCC 2.5 CCC v/ns t rr reverse recovery time CCC 35 CCC ns t j = 25c v r = 34v, CCC 35 CCC t j = 125c i f = 100a q rr reverse recovery charge CCC 26 CCC nc t j = 25c di/dt = 100a/ s  CCC 27 CCC t j = 125c i rrm reverse recovery current CCC 1.5 CCC a t j = 25c t j = 25c, i s = 100a, v gs = 0v  integral reverse r g = 2.7 v gs = 10v  t j = 175c, i s = 100a, v ds = 40v conditions v gs = 10v  v gs = 0v v ds = 25v ? = 1.0 mhz v gs = 0v, v ds = 0v to 32v  v gs = 0v, v ds = 0v to 32v  v ds =20v i d = 100a p-n junction diode. mosfet symbol showing the i d = 30a v dd = 20v conditions v ds = 10v, i d = 100a downloaded from: http:///

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   !"  fig 3. typical output characteristics fig 5. typical transfer characteristics fig 6. normalized on-resistance vs. temperature fig 4. typical output characteristics fig 8. typical gate charge vs. gate-to-source voltage fig 7. typical capacitance vs. drain-to-source voltage 3 4 5 6 7 8 9 v gs , gate-to-source voltage (v) 1.0 10 100 1000 10000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) t j = 25c t j = 150c v ds = 10v 60 s pulse width -60 -40 -20 0 20 40 60 80 100 120 140 160 t j , junction temperature (c) 0.6 0.8 1.0 1.2 1.4 1.6 1.8 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 100a v gs = 10v 0.1 1 10 100 v ds , drain-to-source voltage (v) 100 1000 10000 100000 c , c a p a c i t a n c e ( p f ) v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd c oss c rss c iss 0 20 40 60 80 100 120 140 160 q g , total gate charge (nc) 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 32v v ds = 20v i d = 100a 0.1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 1000 10000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) vgs top 15v 10v 8.0v 7.0v 6.0v 5.0v 4.5v bottom 4.25v 60 s pulse width tj = 25c 4.25v 0.1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 1000 10000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 4.25v 60 s pulse width tj = 150c vgs top 15v 10v 8.0v 7.0v 6.0v 5.0v 4.5v bottom 4.25v downloaded from: http:///

    
   
    
   !"  fig 10. maximum safe operating area fig 11. drain-to-source breakdown voltage fig 9. typical source-drain diode forward voltage fig 12. typical c oss stored energy fig 13. typical on-resistance vs. drain current 0.0 0.5 1.0 1.5 2.0 2.5 v sd , source-to-drain voltage (v) 1.0 10 100 1000 10000 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 150c v gs = 0v -60 -40 -20 0 20 40 60 80 100 120 140 160 t j , temperature ( c ) 40 41 42 43 44 45 46 47 48 49 v ( b r ) d s s , d r a i n - t o - s o u r c e b r e a k d o w n v o l t a g e ( v ) id = 1.0ma 0 200 400 600 800 1000 1200 1400 i d , drain current (a) 0 10 20 30 40 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( m ) v gs = 5.0v v gs = 6.0v v gs = 7.0v v gs = 8.0v v gs =10v 0 5 10 15 20 25 30 35 40 v ds, drain-to-source voltage (v) 0.0 0.2 0.4 0.6 0.8 1.0 e n e r g y ( j ) v ds = 0v to 32v 0.1 1 10 100 v ds , drain-to-source voltage (v) 0.01 0.1 1 10 100 1000 10000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) tc = 25c tj = 150c single pulse 10msec 1msec operation in this area limited by r ds (on) 100 sec dc limited by package downloaded from: http:///

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   !"  fig 14. maximum effective transient thermal impedance, junction-to-case fig 15. typical avalanche current vs.pulsewidth fig 16. maximum avalanche energy vs. temperature notes on repetitive avalanche curves , figures 14, 15:(for further info, see an-1005 at www.irf.com) 1. avalanche failures assumption: purely a thermal phenomenon and failure occurs at a temperature far inexcess of t jmax . this is validated for every part type. 2. safe operation in avalanche is allowed as long ast jmax is not exceeded. 3. equation below based on circuit and waveforms shown in figures 16a, 16b.4. p d (ave) = average power dissipation per single avalanche pulse. 5. bv = rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. i av = allowable avalanche current. 7. ? t = allowable rise in junction temperature, not to exceed t jmax (assumed as 25c in figure 14, 15).t av = average time in avalanche. d = duty cycle in avalanche = t av f z thjc (d, t av ) = transient thermal resistance, see figures 13) p d (ave) = 1/2 ( 1.3bvi av ) =   t/ z thjc i av = 2  t/ [1.3bvz th ] e as (ar) = p d (ave) t av 25 50 75 100 125 150 starting t j , junction temperature (c) 0 20 40 60 80 100 120 140 e a r , a v a l a n c h e e n e r g y ( m j ) top single pulse bottom 1.0% duty cycle i d = 100a 1e-006 1e-005 0.0001 0.001 0.01 0.1 1 t 1 , rectangular pulse duration (sec) 0.001 0.01 0.1 1 t h e r m a l r e s p o n s e ( z t h j c ) c / w 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t1/t2 2. peak tj = p dm x zthjc + tc 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 tav (sec) 1 10 100 1000 a v a l a n c h e c u r r e n t ( a ) allowed avalanche current vs avalanche pulsewidth, tav, assuming ? j = 25c and tstart = 125c. allowed avalanche current vs avalanche pulsewidth, tav, assuming ? tj = 125c and tstart =25c (single pulse) downloaded from: http:///

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       fig 17. threshold voltage vs. temperature 

        
         
       -75 -50 -25 0 25 50 75 100 125 150 t j , temperature ( c ) 1.0 2.0 3.0 4.0 v g s ( t h ) , g a t e t h r e s h o l d v o l t a g e ( v ) i d = 150 a i d = 1.0ma i d = 1.0a 0 200 400 600 800 1000 di f /dt (a/ s) 0 2 4 6 8 10 i r r m ( a ) i f = 60a v r = 34v t j = 25c t j = 125c 0 200 400 600 800 1000 di f /dt (a/ s) 0 2 4 6 8 10 i r r m ( a ) i f = 100a v r = 34v t j = 25c t j = 125c 0 200 400 600 800 1000 di f /dt (a/ s) 0 50 100 150 200 250 300 q r r ( n c ) i f = 60a v r = 34v t j = 25c t j = 125c 0 200 400 600 800 1000 di f /dt (a/ s) 0 50 100 150 200 250 q r r ( n c ) i f = 100a v r = 34v t j = 25c t j = 125c downloaded from: http:///

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   !"  fig 23a. switching time test circuit fig 23b. switching time waveforms fig 22b. unclamped inductive waveforms fig 22a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 t p d.u.t l v ds + - v dd driver a 15v 20v v gs fig 24a. gate charge test circuit fig 24b. gate charge waveform vds vgs id vgs(th) qgs1 qgs2 qgd qgodr fig 22.         for n-channel hexfet   power mosfets  
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         p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-appliedvoltage reverserecovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period    !"  # $%#&'&%  + - + + + - - -       ?        !  ?   " #$## ?        %  && ? #$##'$

    v ds 90%10% v gs t d(on) t r t d(off) t f  ( ) 1 *  %   0.1 %      '(  + -   1k vcc dut 0 l  downloaded from: http:///

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   !"  pqfn 5x6 outline "b" package details pqfn 5x6 outline "b" part marking xxxx xywwx xxxxx international rectifier logo part number (4 or 5 digits) marking code (per marking spec) assembly site code (per scop 200-002) date code pin 1 identifier lot code (eng mode - min last 4 digits of eati#) (prod mode - 4 digits of spn code) )  *  * *+  **$,*%*$ ***%% * *,  % ** 
-./ 0/11222% 1%0*% * 1* 1* -. )  *  * *%3$*% *%0*4, % **  
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*, pqfn 5x6 outline "b" tape and reel bo w p 1 ao ko code tape dimensions reel dimensions quadrant assignments for pin 1 orientation in tape dimens ion des ign to accommodate the component width dimens ion des ign to accommodate the component lenght dimens ion des ign to accommodate the component thicknes s pitch between s ucces s ive cavity centers over al l wi dth of the car r i er tape de s cr ipt ion type package 5 x 6 pqf n note: all dimens ion are nominal di ameter reel qty wi dth reel (mm) ao (mm) bo (mm) ko (mm) p1 (mm) w quadr ant pin 1 (inch) w1 (mm) 13 4000 12.4 6.300 5.300 1.20 8.00 12 q1 downloaded from: http:///

    
   
    
   !"  ir world headquarters: 101 n. sepulveda blvd., el segundo, california 90245, usa to contact international rectifier, please visit http://www.irf.com/whoto-call/  
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  ms l 1 (per je de c j-s t d-020d ?? ) rohs c ompliant yes (per jedec jes d47f ?? guidelines ) qualification information ? industrial qualification level moisture sensitivity level pqfn 5mm x 6mm revision history date comment ? updated e as (l =1mh) = 479mj on page 2 ? updated note 10 limited by t jmax , starting t j = 25c, l = 1mh, r g = 50 , i as = 31a, v gs =10v. on page 2 2/19/2015 downloaded from: http:///


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